Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs.

Xin Zhao Sung Kyu Lim

Published in: ASP-DAC (2010)

Keyphrases

network design
power consumption
high speed
duty cycle
communication networks
network architecture
network design problem
low cost
heuristic solution
facility location
low power
high density
data mining
ip networks
neural network
artificial neural networks