Defect Tolerance Based on Coding and Series Replication in Transistor-Logic Demultiplexer Circuits.
Warren RobinettPhilip KuekesR. Stanley WilliamsPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2007)
Keyphrases
- floating gate
- high speed
- logic synthesis
- delay insensitive
- low power
- logic circuits
- power dissipation
- digital circuits
- asynchronous circuits
- chip design
- logical operations
- coding scheme
- circuit design
- coding method
- power consumption
- logic programming
- fault tolerant
- modal logic
- distributed databases
- random access memory
- defect detection
- classical logic
- quantum computing
- shift register
- flip flops
- predicate logic
- low cost
- cmos technology
- logical framework
- multi valued
- finite state machines
- integrated circuit
- fault models
- image compression
- response time
- neural network