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Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit.
Dipankar Saha
Subhramita Basak
Sagar Mukherjee
Sayan Chatterjee
Chandan Kumar Sarkar
Published in:
CoRR (2013)
Keyphrases
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circuit design
high speed
power dissipation
hardware implementation
efficient implementation
power consumption
neural network
integrated circuit
design considerations
cmos technology
single phase