A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers.
Hiroshi NakamuraTaisuke BokuHideo WadaHiromitsu ImoriIkuo NakataYasuhiro InagamiKisaburo NakazawaYoshiyuki YamashitaPublished in: International Conference on Supercomputing (1993)
Keyphrases
- real time
- parallel architecture
- distributed processing
- management system
- data processing
- design considerations
- processing units
- data sets
- processing elements
- computation intensive
- memory management
- vector valued
- data flow
- data acquisition
- similarity measure
- efficient processing
- hardware implementation
- processing capabilities
- distributed architecture
- information processing
- low cost
- feature vectors