Reducing inter-core cache contention with an adaptive bank mapping policy in DRAM cache.
Fazal HameedLars BauerJörg HenkelPublished in: CODES+ISSS (2013)
Keyphrases
- main memory
- cache management
- prefetching
- memory subsystem
- hit rate
- query processing
- data access
- distributed object
- low cost
- garbage collection
- web caching
- caching scheme
- dynamic random access memory
- data structure
- embedded processors
- hit ratio
- memory access
- replacement policy
- resource consumption
- high density
- input output