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Efficient CMOS Invertible Logic Using Stochastic Computing.
Sean C. Smithson
Naoya Onizawa
Brett H. Meyer
Warren J. Gross
Takahiro Hanyu
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2019)
Keyphrases
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high speed
low cost
computationally efficient
computationally expensive
modal logic
real time
data sets
multiscale
delay insensitive