Test Scheduling for Multi-Clock Domain SoCs under Power Constraint.

Tomokazu Yoneda Kimihiko Masuda Hideo Fujiwara

Published in: IEICE Trans. Inf. Syst. (2008)

Keyphrases

power consumption
high speed
low power
scheduling problem
duty cycle
scheduling algorithm
hard constraints
domain specific
domain independent
resource constraints
cross domain
case study
domain ontology
resource allocation
np hard
training data
transfer learning
statistical significance