Login / Signup
A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies.
Rajiv V. Joshi
Rouwaida Kanj
Keunwoo Kim
Richard Q. Williams
Ching-Te Chuang
Published in:
ISLPED (2007)
Keyphrases
</>
low voltage
random access memory
design considerations
cmos technology
power line
power management
leakage current
power consumption
low power
real time