A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers.
Fabio FrustaciFanny SpagnoloStefania PerriPasquale CorsonelloPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2023)
Keyphrases
- high speed
- random number generator
- random number
- shift register
- low power
- real time
- decision making
- high speed networks
- information technology
- fingerprint authentication
- hardware architecture
- information systems
- hardware design
- frame rate
- hardware architectures
- duty cycle
- video processing
- field programmable gate array
- human resources
- application specific
- data sets