A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS.
Shayan ShahramianBehzad DehlaghiJoshua LiangRyan BespalkoDustin DunwellJames BaileyBo WangAlireza Sharif BakhtiarMichael O'FarrellKerry TangAnthony Chan CarusoneDavid CassanDavide ToniettoPublished in: ISSCC (2019)