A 2.5 GS/s 7-Bit 5-Way Time-Interleaved SAR ADC With On-Chip Background Offset and Timing-Skew Calibration.
Kiho SeongJae-Soub HanYong ShimKwang-Hyun BaekPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
- analog to digital converter
- random access memory
- single chip
- camera calibration
- high speed
- synthetic aperture radar
- aspect ratio
- low cost
- high density
- sar images
- focal length
- analog vlsi
- camera parameters
- complex background
- calibration method
- intrinsic parameters
- parameter estimation
- image sensor
- cmos image sensor
- mixed signal
- cmos technology
- infrared
- foreground objects
- field of view
- low power