Co-synthesis of custom on-chip bus and memory for MPSoC architectures.
Sujan PandeyChristian GenzRolf DrechslerPublished in: VLSI-SoC (2007)
Keyphrases
- high speed
- digital signal processors
- low cost
- memory subsystem
- memory size
- random access memory
- memory access
- memory hierarchy
- computing power
- program synthesis
- memory management
- domain specific
- main memory
- memory requirements
- circuit design
- programmable logic
- single chip
- external memory
- limited memory
- analog vlsi
- processor core
- memory usage
- high density
- neural network
- physical design
- level parallelism
- power dissipation
- field programmable gate array
- random access
- texture synthesis
- power consumption