SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator.
Nobuaki OzakiKimiyoshi UsamiHideharu AmanoMitaro NamikiHiroshi NakamuraMasaaki KondoPublished in: COOL Chips (2011)
Keyphrases
- ultra low power
- low power
- field programmable gate array
- low cost
- compute intensive
- hardware implementation
- heterogeneous computing
- reconfigurable architecture
- embedded systems
- parallel implementation
- high speed
- general purpose
- power consumption
- single chip
- fine grain
- digital signal
- information systems
- knowledge base
- data sets
- real time
- image processing algorithms
- smart camera
- multi objective evolutionary