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Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished.
Milan Ceska
Jirí Matyás
Vojtech Mrazek
Lukás Sekanina
Zdenek Vasícek
Tomás Vojnar
Published in:
ICCAD (2017)
Keyphrases
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high speed
error rate
formal model
complex data
error bounds
data sets
genetic algorithm
higher level
complex systems
error analysis
floating point