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Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs.
Andrés Rodríguez
Angeles G. Navarro
Rafael Asenjo
Francisco Corbera
Ruben Gran Tejero
Darío Suárez Gracia
José L. Núñez-Yáñez
Published in:
J. Syst. Archit. (2019)
Keyphrases
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heterogeneous computing
scheduling problem
edge detection
high speed
weighted graph
edge information
heterogeneous networks
hardware implementation
information systems
signal processing
data acquisition
scheduling algorithm
field programmable gate array
software implementation
real time image processing