A Highly Secure FPGA-Based Dual-Hiding Asynchronous-Logic AES Accelerator Against Side-Channel Attacks.
Jun-Sheng NgJuncheng ChenKwen-Siong ChongJoseph S. ChangBah-Hwee GweePublished in: IEEE Trans. Very Large Scale Integr. Syst. (2022)
Keyphrases
- block cipher
- delay insensitive
- asynchronous circuits
- field programmable gate array
- advanced encryption standard
- smart card
- s box
- secret key
- lightweight
- security analysis
- cryptographic algorithms
- security requirements
- hardware implementation
- hash functions
- authentication protocol
- key management
- logic programming
- modal logic
- parallel implementation
- encryption algorithm
- shift register
- digital signature
- application specific
- private key
- data encryption
- hardware design
- encryption algorithms
- ad hoc networks
- multi valued