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A cell-activation-time controlled SRAM for low-voltage operation in DVFS SoCs using dynamic stability analysis.

Masanao YamaokaKenichi OsadaTakayuki Kawahara
Published in: ESSCIRC (2008)
Keyphrases
  • stability analysis
  • low voltage
  • random access memory
  • nonlinear systems
  • power line
  • dynamic environments
  • design considerations
  • power consumption
  • power management
  • neural network
  • intelligent systems