Review and future prospects of low-voltage RAM circuits.

Yoshinobu Nakagome Masashi Horiguchi Takayuki Kawahara Kiyoo Itoh

Published in: IBM J. Res. Dev. (2003)

Keyphrases

low voltage
random access memory
design considerations
cmos technology
power line
power management
low power
high speed
leakage current
image processing
low cost
cost effective
power consumption