A 7T-NDR Dual-Supply 28-nm FD-SOI Ultra-Low Power SRAM With 0.23-nW/kB Sleep Retention and 0.8 pJ/32b Access at 64 MHz With Forward Back Bias.
Adrian KneipDavid BolPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2023)
Keyphrases
- cmos technology
- low power
- ultra low power
- silicon on insulator
- nm technology
- power consumption
- high speed
- low cost
- knowledge base
- long term
- random access
- image sensor
- single chip
- power dissipation
- data transmission
- low voltage
- real time
- bi directional
- distribution networks
- box counting
- high frequency
- dynamic random access memory