Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction.
Yuki FujitaFengwei AnAiwen LuoXiangyu ZhangLei ChenHans Jürgen MattauschPublished in: APCCAS (2016)
Keyphrases
- hardware architecture
- feature extraction
- hardware implementation
- hardware architectures
- preprocessing
- feature set
- image processing
- field programmable gate array
- feature space
- feature selection
- face recognition
- frequency domain
- feature vectors
- processing elements
- associative memory
- extracted features
- parallel architecture
- neural network
- pattern recognition
- principal component analysis
- efficient implementation
- image processing algorithms