Login / Signup
Recurrence Relations Revisited: Scalable Verification of Bit Level Multiplier Circuits.
Amr A. R. Sayed-Ahmed
Ulrich Kühne
Daniel Große
Rolf Drechsler
Published in:
ISVLSI (2015)
Keyphrases
</>
high speed
floating point
asynchronous circuits
real time
data sets
higher level
random access memory
petri net
analog vlsi