Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS.
Robert PawlowskiJoseph CropMinki ChoJames W. TschanzVivek DeThomas FairbanksHeather QuinnShekhar BorkarPatrick Yin ChiangPublished in: CICC (2014)
Keyphrases
- random access memory
- cmos technology
- power consumption
- embedded dram
- low voltage
- low power
- design considerations
- nm technology
- delay insensitive
- x ray
- high speed
- leakage current
- infrared
- low cost
- silicon on insulator
- flip flops
- multi valued
- logic programming
- dynamic random access memory
- focal plane
- power reduction
- asynchronous circuits
- single chip
- circuit design
- logical framework
- error analysis
- modal logic