Area compact 5T portless SRAM cell for high density cache in 65nm CMOS.
Jitendra YadavPallavi DasAbhinav JainAnuj GroverPublished in: VDAT (2015)
Keyphrases
- high density
- silicon on insulator
- cmos technology
- power consumption
- dynamic random access memory
- data center
- low power
- random access memory
- low density
- nm technology
- low voltage
- close proximity
- memory access
- high bandwidth
- thin film
- high power
- leakage current
- ibm power processor
- low cost
- power management
- embedded dram
- metal oxide semiconductor
- power dissipation
- prefetching
- parallel processing
- magnetic recording
- data access
- magnetic tape
- design considerations
- database
- sensor networks
- power reduction
- query processing
- cloud computing
- single chip