A Robust Hardened Latch Featuring Tolerance to Double-Node-Upset in 28nm CMOS for Spaceborne Application.
Yan LiXu ChengChiyu TanJun HanYuanfu ZhaoLiang WangTongde LiMehdi B. TahooriXiaoyang ZengPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2020)