Fast HUB Floating-Point Adder for FPGA.
Julio VillalbaJavier HormigoSonia González-NavarroPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2019)
Keyphrases
- floating point
- hardware implementation
- field programmable gate array
- square root
- fixed point
- sparse matrices
- high speed
- low cost
- signal processing
- data flow
- fast fourier transform
- hardware architecture
- interval arithmetic
- floating point arithmetic
- instruction set
- logic circuits
- reinforcement learning
- computer vision