Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI.
Adam TemanDavide RossiPascal Andreas MeinerzhagenLuca BeniniAndreas Peter BurgPublished in: ASP-DAC (2015)
Keyphrases
- low power
- high density
- high power
- power consumption
- low cost
- cmos technology
- high speed
- low density
- nm technology
- close proximity
- power dissipation
- power reduction
- data center
- vlsi circuits
- silicon on insulator
- single chip
- vlsi architecture
- image sensor
- digital signal processing
- thin film
- high bandwidth
- logic circuits
- cost effective
- low power consumption
- databases
- wireless transmission
- magnetic tape
- signal processing