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An On-Chip Multi-mode Buck DC-DC Converter for Fine-Grain DVS on a Multi-power Domain SoC Using a 65-nm Standard CMOS Logic Process.

Motoi IchihashiHélène LhermetEdith BeignéFrédéric RothanMarc BellevilleAmara Amara
Published in: PATMOS (2009)
Keyphrases
  • fine grain
  • chip design
  • power consumption
  • low power
  • coarse grain
  • low cost
  • high speed
  • random access memory
  • cmos technology
  • silicon on insulator
  • modal logic
  • analog vlsi
  • real time
  • energy consumption