A 3.2 ppm/°C Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique.
Guoqiang ZhangKosuke YayamaAkio KatsushimaTakahiro MikiPublished in: IEEE J. Solid State Circuits (2018)
Keyphrases
- analog vlsi
- low voltage
- cmos technology
- high speed
- electric field
- power supply
- cmos image sensor
- random access memory
- circuit design
- room temperature
- low cost
- single chip
- electrical power
- chip design
- low power
- image sensor
- mixed signal
- focal plane
- power system
- higher order
- dynamic range
- ultra low power
- nm technology
- power consumption
- solid state
- high voltage
- power dissipation
- physical design
- neural network
- design considerations
- compression algorithm
- parallel processing
- transmission line
- wide dynamic range
- feedback loop
- digital camera
- image compression
- metal oxide semiconductor
- duty cycle
- differential equations
- high density
- thin film
- intelligent control