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Test-wrapper optimisation for embedded cores in through-silicon via-based three-dimensional system on chips.
Brandon Noia
Krishnendu Chakrabarty
Published in:
IET Comput. Digit. Tech. (2011)
Keyphrases
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three dimensional
high speed
high density
feature selection
d objects
real time
range images
image sequences
steady state
embedded systems
low cost
massively parallel