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Process-variation robust and low-power zero-skew buffered clock-tree synthesis using projected scan-line sampling.

Jeng-Liang TsaiCharlie Chung-Ping Chen
Published in: ASP-DAC (2005)
Keyphrases
  • low power
  • power consumption
  • high speed
  • low cost
  • scan line
  • multiresolution
  • object detection
  • image sequences
  • multiscale
  • data flow
  • low power consumption