Design of Parallel Image Compression Circuits for High-speed CMOS Image Sensors.
Yukinari NishikawaShoji KawahitoMasanori FurutaToshihiro TamuraPublished in: Inf. Media Technol. (2007)
Keyphrases
- high speed
- low power
- image sensor
- single chip
- cmos technology
- image compression
- circuit design
- cmos image sensor
- analog to digital converter
- power dissipation
- mixed signal
- power consumption
- real time
- dynamic range
- wavelet transform
- parallel processing
- chip design
- multiscale
- video camera
- hardware and software
- delay insensitive
- image processing algorithms
- digital circuits
- digital signal processing
- data processing
- low cost
- analog vlsi
- charge coupled device
- high quality