Built-in intermediate voltage testing for CMOS circuits.
Jing-Jou TangKuen-Jong LeeBin-Da LiuPublished in: ED&TC (1995)
Keyphrases
- low voltage
- analog vlsi
- delay insensitive
- power supply
- circuit design
- high speed
- cmos technology
- vlsi circuits
- random access memory
- low power
- low cost
- software testing
- design considerations
- floating gate
- power consumption
- test cases
- wide dynamic range
- chip design
- test set
- asynchronous circuits
- power system
- parallel processing
- power dissipation
- transmission line
- power losses