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Simultaneous Subthreshold and Gate-Oxide Tunneling Leakage Current Analysis in Nanometer CMOS Design.

Dongwoo LeeWesley KwongDavid T. BlaauwDennis Sylvester
Published in: ISQED (2003)
Keyphrases
  • leakage current
  • low voltage
  • silicon dioxide
  • design considerations
  • circuit design
  • real time
  • cost effective
  • electron microscopy
  • cmos technology
  • chip design