Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips.
Jian-Wei SuXin SiYen-Chi ChouTing-Wei ChangWei-Hsing HuangYung-Ning TuRuhui LiuPei-Jung LuTa-Wei LiuJing-Hong WangYen-Lin ChungJin-Sheng RenFu-Chun ChangYuan WuHongwu JiangShanshi HuangSih-Han LiShyh-Shyuan SheuChih-I WuChung-Chuan LoRen-Shuo LiuChih-Cheng HsiehKea-Tiong TangShimeng YuMeng-Fan ChangPublished in: IEEE J. Solid State Circuits (2022)
Keyphrases
- structured prediction
- expert systems
- artificial intelligence
- case based reasoning
- random access memory
- edge information
- edge detection
- memory requirements
- knowledge representation
- memory usage
- test set
- integrated circuit
- bayesian networks
- knowledge based systems
- edge detector
- bayesian inference
- machine learning
- data transmission
- probabilistic inference
- power consumption
- intelligent systems
- low cost
- training set