A fractional-sampling-rate ADC-based CDR with feedforward architecture in 65nm CMOS.
Oleksiy TyshchenkoAli SheikholeslamiHirotaka TamuraYasumoto TomitaHisakatsu YamaguchiMasaya KibuneTakuji YamamotoPublished in: ISSCC (2010)
Keyphrases
- feed forward
- sampling rate
- neural architecture
- analog to digital converter
- cmos technology
- back propagation
- neural network
- nm technology
- neural nets
- biologically plausible
- recurrent neural networks
- artificial neural networks
- visual cortex
- activation function
- power consumption
- artificial neural
- hidden layer
- single chip
- analog vlsi
- adaptive neural
- recurrent networks
- real time
- network architecture
- low power
- frame rate
- sigma delta
- cmos image sensor
- three dimensional
- higher order
- low cost
- multi layer
- low voltage
- neuron model
- high speed