Fully digital on-chip memory using minimum height standard cells for near-threshold voltage computing.

Jun Shiomi Tohru Ishihara Hidetoshi Onodera

Published in: PATMOS (2016)

Keyphrases

low cost
memory usage
high density
circuit design
cmos image sensor
processor core
high voltage
digital libraries
memory requirements
power system
high speed
random access
random access memory
input output
analog vlsi
memory subsystem
homology generators
phase locked loop