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ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications.

RaviLomash Chandra AcharyaMahipal DargupallyNeha GuptaNeeraj MishraLalit Mohan DaniNilotpal SarmaDevesh DwivediSudeb DasguptaAnand Bulusu
Published in: APCCAS (2023)
Keyphrases
  • low voltage
  • design considerations
  • power line
  • response time
  • data conversion
  • efficient implementation
  • power management