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Design of High-Performance Asynchronous Pipeline Using Synchronizing Logic Gates.
Zhengfan Xia
Shota Ishihara
Masanori Hariyama
Michitaka Kameyama
Published in:
IEICE Trans. Electron. (2012)
Keyphrases
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logic circuits
computer aided
real time
case study
delay insensitive
user interface
low cost
design process
cost effective
content analysis
engineering design
design space