New Bounds for Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.
Takashi HirayamaRin SuzukiKatsuhisa YamanakaYasuaki NishitaniPublished in: IEICE Trans. Inf. Syst. (2024)
Keyphrases
- lower bound
- logic circuits
- upper bound
- lower and upper bounds
- upper and lower bounds
- low power
- branch and bound
- worst case
- branch and bound algorithm
- objective function
- np hard
- tunnel diode
- vc dimension
- optimal solution
- functional decomposition
- gate array
- real time
- constant factor
- power consumption
- image restoration
- case study