A wide-range clock signal generation scheme for speed grading of a logic core.

Shi-Yu Huang Tzu-Heng Huang Kun-Han Tsai Wu-Tung Cheng

Published in: HPCS (2016)

Keyphrases

classical logic
wide range
logic programming
high speed
duty cycle
signal processing
real time
radio frequency
video sequences
multi agent systems
linear transform