Architectural strategies for low-power VLSI turbo decoders.
Guido MaseraMarco MazzaGianluca PiccininiFabrizio ViglioneMaurizio ZamboniPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2002)
Keyphrases
- low power
- high speed
- single chip
- vlsi circuits
- low cost
- gate array
- power reduction
- power consumption
- vlsi architecture
- power dissipation
- digital signal processing
- mixed signal
- high power
- cmos technology
- logic circuits
- low power consumption
- signal processing
- digital camera
- image sensor
- computer simulation
- signal processor
- real time
- vlsi implementation