High-performance synchronization for circuit emulation in an Ethernet MAN.

Ilija Hadzic Edward S. Szurkowski

Published in: J. Commun. Networks (2005)

Keyphrases

high speed
scientific computing
phase locked loop
cost effective
data acquisition
low power
circuit design
evolvable hardware
electronic circuits
tcp ip
gallium arsenide
high efficiency
analog circuits
digital circuits
shift register
single phase
genetic algorithm
high reliability
embedded systems
multimedia