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Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability.
Hratch Mangassarian
Andreas G. Veneris
Farid N. Najm
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2012)
Keyphrases
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boolean satisfiability
boolean optimization
sat solvers
probabilistic planning
branch and bound algorithm
integer linear programming
symmetry breaking
sat solving
randomly generated
maximum satisfiability
max sat
random sat instances
column generation
sat problem
clause learning