Assessing the Vulnerability of Time-Controlled Logic-Loop-Based Circuits to Voltage Fault Injection and Power Monitoring Attacks.
Ziyang YeMakoto IkedaPublished in: ICICDT (2023)
Keyphrases
- fault injection
- chip design
- java card
- logic synthesis
- delay insensitive
- digital circuits
- logic circuits
- asynchronous circuits
- power losses
- power dissipation
- fault model
- smart card
- electrical power
- power consumption
- power system
- static analysis
- field effect transistors
- low voltage
- countermeasures
- transmission line
- low power
- power reduction
- information security
- pattern matching