Login / Signup

SRAM Arrays with Built-in Parity Computation for Real-Time Error Detection in Cache Tag Arrays.

Ramon CanalYiannakis SazeidesArkady Bramnik
Published in: DATE (2021)
Keyphrases
  • error detection
  • error correction
  • real time
  • error correcting
  • fault tolerance
  • error recovery
  • data cleansing
  • low cost
  • data access
  • data hiding
  • fault diagnosis
  • power consumption
  • data transmission
  • embedded processors