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Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS.
Rosa Rodríguez-Montañés
Jaume A. Segura
Víctor H. Champac
Joan Figueras
J. A. Rubio
Published in:
ITC (1991)
Keyphrases
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floating gate
circuit design
low voltage
leakage current
low cost
delay insensitive
neural network
high speed