Yury Antonov

Publication Activity (10 Years)

Years Active: 2015-2020
Publications (10 Years): 10

Top Topics

Digital Holography

Inverted Pendulum

Top Venues

Publications

Tze Hin Cheung, Mikko Martelius, Yury Antonov, Rehman Akbar, Jussi Ryynänen, Aarno Pärssinen, Kari Stadius
A 3.5-GHz Digitally-Controlled Open-Loop Fractional-N Frequency Divider in 28-nm CMOS. ISCAS (2020)
Jerry Lemberg, Mikko Martelius, Enrico Roverato, Yury Antonov, Tero Nieminen, Kari Stadius, Lauri Anttila, Mikko Valkama, Marko Kosunen, Jussi Ryynänen
A 1.5-1.9-GHz All-Digital Tri-Phasing Transmitter With an Integrated Multilevel Class-D Power Amplifier Achieving 100-MHz RF Bandwidth. IEEE J. Solid State Circuits 54 (6) (2019)
Yury Antonov, Mikko Valkama, Marko Kosunen, Jussi Ryynänen, Mahwish Zahra, Kari Stadius, Zahra Khonsari, Ilia Kempi, Toni Miilunpalo, Juha Inkinen, Vishnu Unnikrishnan, Lauri Anttila
A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS. ESSCIRC (2019)
Yury Antonov, Markus Törmänen, Jussi Ryynänen, Aarno Pärssinen, Kari Stadius
A 20-60GHz Digitally Controlled Composite Oscillator for 5G. NGCAS (2018)
Yury Antonov, Mahwish Zahra, Kari Stadius, Zahra Khonsari, Nouman Ahmed, Ilia Kempi, Juha Inkinen, Vishnu Unnikrishnan, Jussi Ryynänen
A 3-43ps time-delay cell for LO phase-shifting in 1.5-6.5GHz beamsteering receiver. NEWCAS (2018)
Yury Antonov, Svyatoslav Ballandovich, Grigory Kostikov, Liubov Liubina, Mikhail Sugak
Wideband 3D-Printed Reflectarray of Closed-Volume Elements. ICUMT (2018)
Faizan Ul Haq, Mikko Englund, Yury Antonov, Kari Stadius, Marko Kosunen, Jussi Ryynänen, Kim B. Östman, Kimmo Koli
Full-Duplex Wireless Transceiver Self-Interference Cancellation Through FD-SOI Buried-Gate Signaling. ISCAS (2018)
Yury Antonov, Kari Stadius, Jussi Ryynänen
A charge limiting and redistribution method for delay line locking in multi-output clock generation. ISCAS (2017)
Yury Antonov, Kari Stadius, Marko Kosunen, Jussi Ryynänen
Open-loop all-digital delay line with on-chip calibration via self-equalizing delays. ECCTD (2017)
Yury Antonov, Tero Tikka, Kari Stadius, Jussi Ryynänen
All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter. ECCTD (2015)