Login / Signup
Yuanlin Lu
Publication Activity (10 Years)
Years Active: 2004-2008
Publications (10 Years): 0
</>
Publications
</>
Yuanlin Lu
,
Vishwani D. Agrawal
Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation.
VLSI Design
(2008)
Yuanlin Lu
,
Vishwani D. Agrawal
Statistical Leakage and Timing Optimization for Submicron Process Variation.
VLSI Design
(2007)
Yuanlin Lu
,
Vishwani D. Agrawal
CMOS Leakage and Glitch Minimization for Power-Performance Tradeoff.
J. Low Power Electron.
2 (3) (2006)
Yuanlin Lu
,
Vishwani D. Agrawal
Assignment and Path Balancing.
PATMOS
(2005)
Michael T. Frye
,
Yuanlin Lu
,
Chunjiang Qian
Decentralized output feedback control of large-scale nonlinear systems interconnected by unmeasurable states.
ACC
(2004)