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Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation.

Yuanlin LuVishwani D. Agrawal
Published in: VLSI Design (2008)
Keyphrases
  • high speed
  • power consumption
  • real time
  • analog vlsi
  • process model
  • circuit design
  • neural network
  • artificial neural networks
  • low power
  • chip design