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Yuanfeng Sun
Publication Activity (10 Years)
Years Active: 2008-2011
Publications (10 Years): 0
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Publications
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Yuanfeng Sun
,
Jian Qiao
,
Xueyi Yu
,
Woogeun Rhee
,
Byeong-Ha Park
,
Zhihua Wang
A Continuously Tunable Hybrid LC-VCO PLL With Mixed-Mode Dual-Path Control and Bi-level Delta-Sigma Modulated Coarse Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap.
(9) (2011)
Jun Li
,
Ni Xu
,
Yuanfeng Sun
,
Woogeun Rhee
,
Zhihua Wang
Reconfigurable, fast AFC technique using code estimation and binary search algorithm for 0.2-6GHz software-defined radio frequency synthesis.
APCCAS
(2010)
Li Zhang
,
Xueyi Yu
,
Yuanfeng Sun
,
Woogeun Rhee
,
Dawn Wang
,
Zhihua Wang
,
Hongyi Chen
A Hybrid Spur Compensation Technique for Finite-Modulo Fractional-N Phase-Locked Loops.
IEEE J. Solid State Circuits
44 (11) (2009)
Xueyi Yu
,
Yuanfeng Sun
,
Woogeun Rhee
,
Hyung Ki Ahn
,
Byeong-Ha Park
,
Zhihua Wang
A ΔΣ Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications.
IEEE J. Solid State Circuits
44 (8) (2009)
Xueyi Yu
,
Yuanfeng Sun
,
Woogeun Rhee
,
Zhihua Wang
An FIR-Embedded Noise Filtering Method for ΔΣ Fractional-N PLL Clock Generators.
IEEE J. Solid State Circuits
44 (9) (2009)
Xueyi Yu
,
Yuanfeng Sun
,
Li Zhang
,
Woogeun Rhee
,
Zhihua Wang
A 1GHz Fractional-N PLL Clock Generator with Low-OSR ΔΣ Modulation and FIR-Embedded Noise Filtering.
ISSCC
(2008)
Xueyi Yu
,
Yuanfeng Sun
,
Woogeun Rhee
,
Zhihua Wang
,
Hyung Ki Ahn
,
Byeong-Ha Park
A ΔΣ fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applications.
CICC
(2008)